Microchip Technology MCP6 series Manual de usuario descargar pdf (Pagina 10)

AN900

DS00900A-page 10  2004 Microchip Technology Inc.

DRIVE FREQUENCY CALCULATION FOR V/f

CONTROL WITH VELOCITY FEEDBACK

The microcontroller uses the ADC measurement to cal-

culate the target speed. The speed error is calculated

by subtracting the actual speed (as measured by the

QEI) from the target speed. The velocity error is used

as an input to the PID algorithm, which determines the

motor drive frequency. The V/f function determines the

corresponding drive amplitude.

EQUATION 2: CALCULATING DRIVE FREQUENCY FROM VELOCITY ERROR

PWM Waveform Synthesis

The sinusoidal waveform is created by constantly

changing the PWM duty cycle for each output. The

motor drive frequency determines how often the PWM

duty cycle values are updated and thus, the frequency

of the synthesized waveform. The peak-to-peak drive

amplitude corresponds to the maximum PWM duty

cycle, as this generates the maximum voltage output of

each half-bridge of the inverter. The duty cycle

determines the drive amplitude at any given point in the

cycle.

The duty cycle update rate is set by modifying the

Timer0 reload value. This determines the interval until

next Timer0 overflow. The PWM Duty Cycle (PDC)

registers of the three PWM units are modified as follows:

1. When a Timer0 interrupt occurs, an updated

target drive frequency is determined by either

Equation 1 or Equation 2 (depending on the

control method being used).

2. The sine value for each phase is read from the

sine table, pointed to by the offset value for that

phase.

3. The PWM duty cycle for a particular phase is

calculated by multiplying the sine value from the

table by the updated motor drive frequency. The

16-bit product is stored in the PDC register for

that phase. Steps 2 and 3 are repeated for each

phase.

4. The offset values are updated for the next table

access.

5. If the direction of rotation is to be reversed, then

the offsets of two phases are swapped. The

offsets of Phase 1 and 2 are swapped for this

purpose.

6. The Timer0 reload value is calculated based on

the updated motor drive frequency (Equation 3),

where f is the drive frequency. In the current

version of firmware, the number of sine table

entries is set at 19. The reload value determines

the value at which the PWM duty cycle is

updated.

7. The new PWM duty cycle values take effect at

the beginning of the next PWM period. The duty

cycle determines the drive amplitude at any

given point in the cycle.

EQUATION 3: CALCULATING TIMER0 RELOAD VALUE

1. Calculate Actual Speed from QEI Velocity Mode:

actual

FOSC

QE edges per revolution

Value of velocity register pair

= f

actual

× 60

where: F

actual

is the actual rotor speed (RPM) and f

actual

is the actual rotor speed (Hz)

2. Calculate Speed Error:

where: f

target

is the target drive frequency (Hz), f

error

is the frequency error and slip is the expected percent slip

error

= (f

target

× (100 – slip)) – f

actual

3. Calculate Drive Frequency from PID Algorithm:

where:

target

= (Kp

× f

error

) + (Ki × ∑f

error

) + (Kd × (f

error –

error

))

t – 1

Kp is the proportional gain ∑f

error

is the cumulative sum of frequency errors

Ki is the integral gain

Kd is the differential gain

error –

error

is the difference in error between the

current and immediately previous time period

t – 1

FOSC

Timer0 Reload Value = FFFFh –

(2 • (sine table entries – 1)) × Timer0 prescaler value × f

1 2 ... 5 6 7 8 9 10 11 12 13 14 15 ... 23 24

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