© 2009 Microchip Technology Inc. DS70198C-page 12-3
Section 12. Input Capture
Input Capture
12
12.2 INPUT CAPTURE REGISTERS
Each capture channel available on dsPIC33F family devices has these registers:
• ICxCON: Input Capture Control register
• ICxBUF: Input Capture Buffer register
Register 12-1: ICxCON: Input Capture x Control Register
U-0 U-0 R/W-0 U-0 U-0 U-0 U-0 U-0
— —ICSIDL — — — — —
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R-0, HC R-0, HC R/W-0 R/W-0 R/W-0
ICTMR ICI<1:0> ICOV ICBNE ICM<2:0>
bit 7 bit 0
Legend: HC = Cleared in Hardware
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-14 Unimplemented: Read as ‘0’
bit 13 ICSIDL: Input Capture x Stop in Idle Control bit
1 = Input capture halts in CPU Idle mode
0 = Input capture continues to operate in CPU Idle mode
bit 12-8 Unimplemented: Read as ‘0’
bit 7 ICTMR: Input Capture x Timer Select bit
1 = TMR2 contents are captured on capture event
0 = TMR3 contents are captured on capture event
bit 6-5 ICI<1:0>: Select Number of Captures per Interrupt bits
11 = Interrupt on every fourth capture event
10 = Interrupt on every third capture event
01 = Interrupt on every second capture event
00 = Interrupt on every capture event
bit 4 ICOV: Input Capture x Overflow Status Flag bit (read-only)
1 = Input capture overflow occurred
0 = No input capture overflow occurred
bit 3 ICBNE: Input Capture x Buffer Empty Status Flag bit (read-only)
1 = Input capture buffer is not empty, at least one more capture value can be read
0 = Input capture buffer is empty
bit 2-0 ICM<2:0>: Input Capture x Mode Select bits
111 = Input capture functions as interrupt pin only when device is in Sleep or Idle mode (rising edge
detect only, all other control bits are not applicable)
110 = Unused (Input Capture module disabled)
101 = Capture mode, every 16th rising edge
100 = Capture mode, every 4th rising edge
011 = Capture mode, every rising edge
010 = Capture mode, every falling edge
001 = Capture mode, every edge – rising and falling (ICI<1:0> bits do not control interrupt generation
for this mode)
000 = Input Capture module turned off
(128 paginas)
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