
© 2009 Microchip Technology Inc. DS70198C-page 12-7
Section 12. Input Capture
Input Capture
12
12.5 INPUT CAPTURE INTERRUPTS
The input capture channel can generate an interrupt based on the selected number of capture
events, as illustrated in Figure 12-4. The number of events is set by the Input Capture Interrupt
(ICI<1:0>) bits in the Capture Control (ICxCON<6:5>) register, as provided in Table 12-2. The
user-assigned application must disable the Input Capture module (ICM<2:0> = 000) before
changing the ICI<1:0> bits.
When the capture interrupt is generated on every capture event (ICI<1:0> = 00), the FIFO
overflow condition does not inhibit the capture interrupt. If the capture interrupt is not generated
on every capture event, the FIFO overflow condition inhibits the capture interrupt. Therefore, all
the captured values must be read from the capture buffer on every capture interrupt. For
example, if the capture interrupt is generated on every second capture event (ICI = 01), the
capture buffer must be read twice. Similarly, if the capture interrupt is generated on every third
capture event (ICI = 10), the capture buffer must be read three times.
Figure 12-4: Input Capture Interrupt Generation
Note: In Edge Detection Mode (ICM = 001), the interrupt is generated on every capture
event and the Input Capture Interrupt (ICI<1:0>) bits are ignored.
Table 12-2: Input Capture Interrupt Selection
ICI<1:0> Values Input Capture Interrupt Generation
00 Interrupt on every capture event
01 Interrupt on every second capture event
10 Interrupt on every third capture event
11 Interrupt on every fourth capture event
Note: Each Input Capture channel has interrupt flag status bits (ICxIF), Interrupt Enable
bits (ICxIE) and Interrupt Priority Control bits (ICxIP<2:0>). Refer to
Section 6. “Interrupts” (DS70184) in the “dsPIC33F Family Reference Manual” for
more details on peripheral interrupts.
Capture Event
Capture Interrupt
(ICI<1:0> = 0b00)
Capture Interrupt
(ICI<1:0> = 0b01)
Capture Interrupt
(ICI<1:0> = 0b10)
Capture Interrupt
(ICI<1:0> = 0b11)
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