dsPIC33F/PIC24H Family Reference Manual
DS70205C-page 11-14 © 2010 Microchip Technology Inc.
11.4.4 Asynchronous Counter Mode (Type A Timer only)
A Type A timer has the ability to operate in an Asynchronous Counting mode. In Asynchronous
Counter mode, the input clock to the timer is derived from the external clock input (TxCK) divided
by a programmable prescaler. In this mode, the external clock input is not synchronized with the
internal device clock. When enabled, the timer increments by one on every rising edge of the
input clock and generates an interrupt on a period match.
To configure the Asynchronous Counter mode:
• Clear the TSYNC control bit (TxCON<2>) to disable clock synchronization
• Set the TCS control bit (TxCON<1>) to select the external clock source
In Asynchronous Counter mode:
• The timer can be clocked from the low-power 32 kHz secondary crystal oscillator for RTC
applications by setting the Secondary Oscillator Enable bit (LPOSCEN) in the Oscillator
Control register (OSCCON<1>). For further details, refer to Section 7. “Oscillator”
(DS70186).
• The timer can operate during Sleep mode, if the external clock input is active or the
secondary oscillator is enabled. The timer can generate an interrupt (if enabled) on a
period register match to wake-up the processor from Sleep mode.
• The high and low time of the external clock input must not violate the minimum pulse-width
requirement of 10 ns nominal (or 50 MHz nominal frequency).
Example 11-4 illustrates the code sequence to set up the Timer1 module in Asynchronous
Counter mode. This code generates an interrupt on every second when running on 32 kHz clock
input.
Example 11-4: Initialization Code for 16-bit Asynchronous Counter Mode
Note 1: For the external clock timing requirement in Asynchronous Counter mode, refer to
the “Electrical Characteristics” chapter of the specific device data sheet.
2: The PRx register resets on the subsequent rising edge of the timer clock input.
3: The TxIF bit is set one instruction cycle after a period match.
Note: The timer counts PRx times for the first TxIF event and (PRx + 1) times for all
subsequent TxIF events. For applications in which the asymmetry in interrupt timing
is not acceptable, it is recommended to ignore the first TxIF event after enabling the
timer.
T1CONbits.TON = 0; // Disable Timer
T1CONbits.TCS = 1; // Select external clock
T1CONbits.TSYNC = 0; // Disable Synchronization
T1CONbits.TCKPS = 0b00; // Select 1:1 Prescaler
TMR1 = 0x00; // Clear timer register
PR1 = 32767; // Load the period value
IPC0bits.T1IP = 0x01; // Set Timer1 Interrupt Priority Level
IFS0bits.T1IF = 0; // Clear Timer1 Interrupt Flag
IEC0bits.T1IE = 1; // Enable Timer1 interrupt
T1CONbits.TON = 1; // Start Timer
/* Example code for Timer1 ISR */
void __attribute__((__interrupt__, no_auto_psv)) _T1Interrupt(void)
{
/* Interrupt Service Routine code goes here */
IFS0bits.T1IF = 0; // Clear Timer1 Interrupt Flag
}
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